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Title
Recent advances in PMOS negative bias temperature instability : characterization and modeling of device architecture, material and process impact / Souvik Mahapatra, editor.
ISBN
9789811661204 (electronic bk.)
9811661200 (electronic bk.)
9789811661198
9811661197
Published
Singapore : Springer, [2022]
Copyright
©2022
Language
English
Description
1 online resource : illustrations (chiefly color)
Item Number
10.1007/978-981-16-6120-4 doi
Call Number
TK7871.99.M44 R43 2022
Dewey Decimal Classification
621.3815
Summary
This book covers advances in Negative Bias Temperature Instability (NBTI) and will prove useful to researchers and professionals in the semiconductor devices areas. NBTI continues to remain as an important reliability issue for CMOS transistors and circuits. Development of NBTI resilient technology relies on utilizing suitable stress conditions, artifact free measurements and accurate physics-based models for the reliable determination of degradation at end-of-life, as well as understanding the process, material and device architectural impacts. This book discusses: Ultra-fast measurements and modelling of parametric drift due to NBTI in different transistor architectures: planar bulk and FDSOI p-MOSFETs, p-FinFETs and GAA-SNS p-FETs, with Silicon and Silicon Germanium channels. BTI Analysis Tool (BAT), a comprehensive physics-based framework, to model the measured time kinetics of parametric drift during and after DC and AC stress, at different stress and recovery biases and temperature, as well as pulse duty cycle and frequency. The Reaction Diffusion (RD) model is used for generated interface traps, Transient Trap Occupancy Model (TTOM) for charge occupancy of the generated interface traps and their contribution, Activated Barrier Double Well Thermionic (ABDWT) model for hole trapping in pre-existing bulk gate insulator traps, and Reaction Diffusion Drift (RDD) model for bulk trap generation in the BAT framework; NBTI parametric drift is due to uncorrelated contributions from the trap generation (interface, bulk) and trapping processes. Analysis and modelling of Nitrogen incorporation into the gate insulator, Germanium incorporation into the channel, and mechanical stress effects due to changes in the transistor layout or device dimensions; similarities and differences of (100) surface dominated planar and GAA MOSFETs and (110) sidewall dominated FinFETs are analysed.
Note
Includes index.
Access Note
Access limited to authorized users.
Digital File Characteristics
text file
PDF
Source of Description
Online resource; title from PDF title page (SpringerLink, viewed December 9, 2021).
Characterization of NBTI Parametric Drift
BAT Framework Modeling of Gate First HKMG Si and SiGe Channel FDSOI MOSFETs
BTI Analysis Tool (BAT) Model Framework
BAT Framework Modeling of RMG HKMG SOI FinFETs
BAT Framework Modeling of RMG HKMG GAA-SNS FETs
BAT Framework Modeling of RMG HKMG Si and SiGe Channel FinFETs
BAT Framework Modeling of Gate First HKMG Si Channel MOSFETs
BAT Framework Modeling of AC NBTI: Stress Mode, Duty Cycle and Frequency
BAT Framework Modeling of Dimension Scaling in FinFETs and GAA-SNS FETs
BTI Analysis Tool (BAT) Model Framework-Generation of Interface Traps
Device Architecture, Material and Process Dependencies of NBTI Parametric Drift
Physical Mechanism of NBTI Parametric Drift
BAT Framework Modeling of Gate First HKMG Si-capped SiGe Channel MOSFETs
BTI Analysis Tool (BAT) Model Framework-Interface Trap Occupancy and Hole Trapping.
