Title
Computing with memory for energy-efficient robust systems [electronic resource] / Somnath Paul, Swarup Bhunia.
ISBN
9781461477983 electronic book
1461477980 electronic book
9781461477976
Published
New York : Springer, 2014.
Language
English
Description
1 online resource (xiii, 210 pages) : illustrations (some color)
Item Number
10.1007/978-1-4614-7798-3 doi
Call Number
TK7885
Dewey Decimal Classification
621.39/5
Summary
This book analyzes energy and reliability as major challenges faced by designers of computing frameworks in the nanometer technology regime. The authors describe the existing solutions to address these challenges and then reveal a new reconfigurable computing platform, which leverages high-density nanoscale memory for both data storage and computation to maximize the energy-efficiency and reliability. The energy and reliability benefits of this new paradigm are illustrated and the design challenges are discussed. Various hardware and software aspects of this exciting computing paradigm are described, particularly with respect to hardware-software co-designed frameworks, where the hardware unit can be reconfigured to mimic diverse application behavior. Finally, the energy-efficiency of the paradigm described is compared with other, well-known reconfigurable computing platforms. Introduces new paradigm for hardware reconfigurable frameworks, which leverages dense memory array as a malleable resource, which can be used for information storage as well as computation; Merges spatial and temporal computing to minimize interconnect overhead and achieve better scalability compared to state-of-the-art reconfigurable computing platforms; Enables efficient mapping of diverse data-intensive applications from domains of signal processing, multimedia and security applications.
Bibliography, etc. Note
Includes bibliographical references.
Access Note
Access limited to authorized users.
Source of Description
Description based on online resource; title from PDF title page (SpringerLink, viewed September 9, 2013).
Part I. Introduction
Challenges in Computing for Nanoscale Technologies
A Survey of Computing Architectures
Motivation for a Memory-Based Computing Hardware
Part II. Memory Based Computing
Key Features of Memory-Based Computing
Overview of Hardware and Software Architectures
Application of Memory-Based Computing
Part III. Hardware Framework
A Memory Based Generic Reconfigurable Framework
MAHA Hardware Architecture
Part IV. Software Framework
Application Analysis
Application Mapping to MBC Hardware.
