Fundamentals of bias temperature instability in MOS transistors [electronic resource] : characterization methods, process and materials impact, DC and AC modeling / Souvik Mahapatra, editor.
2016
TK7871.95 .F86 2016eb
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Title
Fundamentals of bias temperature instability in MOS transistors [electronic resource] : characterization methods, process and materials impact, DC and AC modeling / Souvik Mahapatra, editor.
ISBN
9788132225089 (electronic book)
8132225082 (electronic book)
9788132225072
8132225082 (electronic book)
9788132225072
Published
New Delhi : Springer, [2016]
Language
English
Description
1 online resource.
Item Number
10.1007/978-81-322-2508-9 doi
Call Number
TK7871.95 .F86 2016eb
Dewey Decimal Classification
621.3815/284
Summary
This book aims to cover different aspects of Bias Temperature Instability (BTI). BTI remains as an important reliability concern for CMOS transistors and circuits. Development of BTI resilient technology relies on utilizing artefact-free stress and measurement methods and suitable physics-based models for accurate determination of degradation at end-of-life, and understanding the gate insulator process impact on BTI. This book discusses different ultra-fast characterization techniques for recovery artefact free BTI measurements. It also covers different direct measurements techniques to access pre-existing and newly generated gate insulator traps responsible for BTI. The book provides a consistent physical framework for NBTI and PBTI respectively for p- and n- channel MOSFETs, consisting of trap generation and trapping. A physics-based compact model is presented to estimate measured BTI degradation in planar Si MOSFETs having differently processed SiON and HKMG gate insulators, in planar SiGe MOSFETs and also in Si FinFETs. The contents also include a detailed investigation of the gate insulator process dependence of BTI in differently processed SiON and HKMG MOSFETs. The book then goes on to discuss Reaction-Diffusion (RD) model to estimate generation of new traps for DC and AC NBTI stress, and Transient Trap Occupancy Model (TTOM) to estimate charge occupancy of generated traps and their contribution to BTI degradation. Finally, a comprehensive NBTI modeling framework including TTOM enabled RD model and hole trapping to predict time evolution of BTI degradation and recovery during and after DC stress for different stress and recovery biases and temperature, during consecutive arbitrary stress and recovery cycles, and during AC stress at different frequency and duty cycle. The contents of this book should prove useful to academia and professionals alike.
Bibliography, etc. Note
Includes bibliographical references and index.
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Added Author
Mahapatra, Souvik, editor.
Series
Springer series in advanced microelectronics ; v. 139.
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Print version: 9788132225072
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Table of Contents
Introduction: Bias Temperature Instability (BTI) in N and P Channel MOSFETs
Characterization Methods for BTI Degradation and Associated Gate Insulator Defects
Physical Mechanism of BTI Degradation? Direct Estimation of Trap Generation and Trapping
Physical Mechanism of BTI Degradation?Modeling of Process and Material Dependence
Reaction-Diffusion Model
Modeling of DC and AC NBTI Degradation and Recovery for SiON and HKMG MOSFETs
Index.
Characterization Methods for BTI Degradation and Associated Gate Insulator Defects
Physical Mechanism of BTI Degradation? Direct Estimation of Trap Generation and Trapping
Physical Mechanism of BTI Degradation?Modeling of Process and Material Dependence
Reaction-Diffusion Model
Modeling of DC and AC NBTI Degradation and Recovery for SiON and HKMG MOSFETs
Index.