Automated analysis of virtual prototypes at the electronic system level : design understanding and applications / Mehran Goli, Rolf Drechsler.
Goli, Mehran.; Drechsler, Rolf.
2020
TS171.8
Available Online

Linked e-resources

Linked Resource Online Access
Concurrent users Unlimited
Authorized users Authorized users
Document Delivery Supplied Can lend chapters, not whole ebooks

Details

Title Automated analysis of virtual prototypes at the electronic system level : design understanding and applications / Mehran Goli, Rolf Drechsler.
Author Goli, Mehran.
ISBN 9783030442828 (electronic book)
3030442829 (electronic book)
3030442810
9783030442811
DOI https://doi.org/10.1007/978-3-030-44
https://doi.org/10.1007/978-3-030-44282-8
Imprint Cham : Springer, 2020.
Language English
Description 1 online resource
Other Standard Identifiers 10.1007/978-3-030-44
10.1007/978-3-030-44282-8 doi
Call Number TS171.8
Dewey Decimal Classification 620/.0042
Summary This book describes a set of SystemC-based virtual prototype analysis methodologies, including design understanding, verification, security validation, and design space exploration. Readers will gain an overview of the latest research results in the field of Electronic Design Automation (EDA) at the Electronic System Level (ESL). The methodologies discussed enable readers to tackle easily key tasks and applications in the design process. Provides an extensive introduction to the field of SystemC-based virtual prototype (VP) analysis at the electronic system level; Describes a design understanding methodology from both debugger-based and compiler-based perspectives; Illustrates a semi-formal verification approach to check the validity of a given VP against its specification, user-defined rules and protocol; Discusses a security validation approach to validate the run-time behavior of a given VP-based SoC against security threat models, such as information leakage (confidentiality) and unauthorized access to data in a memory (integrity); Describes a design space exploration approach for SystemC-based VPs to guide designers to know under which error limits, different portions of a given VP can be approximated at different granularity levels.
Bibliography, etc. Note Includes bibliographical references and index.
Access Note Access limited to authorized users.
Digital File Characteristics text file PDF
Added Author Drechsler, Rolf.
Available in Other Form Print version: 9783030442811
Linked Resources Online Access
Record Appears in Online Resources > Ebooks
All Resources
Chapter 1. Introduction
Chapter 2. Background
Chapter 3. Design Understanding Methodology
Chapter 4. Application I: Verification
Chapter 5. Application II: Security Validation
Chapter 6. Application III: Design Space Exploration
Chapter 7. Conclusion.

Browse Subjects

Show more subjects...

Statistics

from
to
Export